Apr 13

Chapter 15: Digital filter design

* 15.1 General concepts
* 15.2 FIR filters
* 15.3 IIR filters

This chapter briefly describes Filter Designer Tool which is a constituent part of the mikroPascal, mikroC, and mikroBasic. This tool serves for designing digital filters.
15.1 General concepts

Filter Designer Tool allows simple and very fast design of digital filters. Fig. 15-1 shows one option in the main menu of mikroPascal which enables access to Filter Designer Tool.
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Apr 13

Chapter 14: DSP Examples

* 14.1 Useful functions and procedures
* 14.2.1 Example 1 – Menu
* 14.2.2 Example 2 – DTMFout
* 14.2.3 Example 3 – DTMFin
* 14.2.4 Example 4 – Acceleration sensor

14.1 Useful functions and procedures

At the beginning of this chapter the functions and procedures used in this chapter will be described together with some other useful functions and procedures. Table 14-1 presents a list of the functions and procedures including a description of their parameters, results (functions only), and evenual restrictions on the paremeter values.
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Apr 13

Chapter 13: Examples

* Example 1 – Operating alpha-numeric LCD module by using 4-bit interface
* Example 2 – Operating alpha-numeric LCD module by using 8-bit interface
* Example 3 – Operating a graphical alpha-numeric LCD module (GLCD)
* Example 4 – Operating an AD converter
* Example 5 – Operating a 4 x 4 keyboard
* Example 6 – Realization of pulse width modulation
* Example 7 – Operating a compact flash memory card
* Example 8 – Operating UART modules
* Example 9 – Operating SPI modules
* Example 10 – Operating Secure Digital memory cards
* Example 11 – Operating I2C modules
* Example 12 – Operating a PS/2 keyboard

Example 1 – Operating alpha-numeric LCD module by using 4-bit interface

The example shows the connection of an alpha-numeric LCD module 2×16 characters to a dsPIC30F microcontroller by using a 4-bit interface. In the example a value measured by the AD converter is displayed on the LCD module. The example covers the initialization of the LCD module and instructions for contolling and writing the module. The realization is carried out by using the mikroPascal compiler for dsPIC30F microcontrollers. The interconnection of the LCD module and a dsPIC30F device by using a 4-bit interface is shown in Fig. 13-1.
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Apr 13

Chapter 12: I²C (Inter Integrated Circuit) module


* Introduction
* 12.1 Operating modes of I2C module
* 12.1.1 I2C slave mode with 7-bit addressing
* 12.1.2 I2C slave mode with 10-bit addressing
* 12.1.3 I2C master mode

* 12.2 Baud-rate generator
* 12.3 I2C module interrupts
* 12.4 Slope control
* 12.5 Intelligent peripheral management interface (IPMI) support
* 12.6 General call address support

* 12.7 Operation of I2C module in SLEEP and IDLE states
* 12.7.1 Operation of I2C module in SLEEP state
* 12.7.2 Operation of I2C module in IDLE state Auto baud support

Introduction

The Inter Integrated Circuit (I2C) module is a serial interface primarily intended for communication with other peripheral or microcontroller devices. Examples of the peripheral devices are: serial EEPROM memories, shift registers, display drivers, serial AD converters, etc. In the dsPIC30F family of devices the I2C module can operate in the following systems:

* the dsPIC30F device is a slave device,
* the dsPIC30F device is a master device in a single-master environment (slave may also be active),
* the dsPIC30F device acts as a master/slave device in a multi-master system (bus collision detection and arbitration available).

The I2C module contains independent I2C master logic and I2C slave logic each generating interrupts based on their events. In multi-master systems, the software is simply partitioned into master controller and slave controller. When the master logic is active, the slave logic remains active also, detecting the state of the bus and potentially receiving messages from itself or from other I2C devices. No messages are lost during multi-master bus arbitration. In a multi-master system, bus collision conflicts with other masters in the system are detected and the module provides a method to terminate and then restart the messages.
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Apr 13

Chapter 11: DSP Engine

* Introduction
* 11.1 X and Y data buses
* 11.2 PSV management
* 11.3 Multiplier
* 11.4 Barrel shifter
* 11.5 Adder
* 11.6 Round logic
* 11.7 Saturation logic
* 11.8 DSP instructions
* 11.9 DSP examples

Introduction

Digital signal processing (DSP) module is a part of the device specialized for fast execution of the basic mathematical operations (add, subtract, and multiply) and for performing automatically accumulation, logical shifting, rounding off, and saturation. This module makes the dsPIC30F devices very powerful and considerably extends the scope of their applications.

Processing of digital signals is very demanding. One of the biggest problems is the multiplication required for processing of digital signals. The family of dsPIC30F devices has a hardware implemented multiplier which accelerates considerably the processing. The major part of digital signal processing reduces to calculating the sums of products of two arrays. This module has been designed to allow a fast calculation of the sum of products:
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Apr 12

Chapter 10: UART Module

* Introduction
* 10.1 Baud-rate generator BRG
* 10.2 UART configuration

* 10.3 UART transmitter
* 10.3.1 Transmit interrupt
* 10.3.2 Setup for UART transmit

* 10.4 UART receiver
* 10.4.1 Receive interrupt
* 10.4.2 Setup for UART reception

* 10.5 UART in loopback mode
* 10.6 Auto baud support
* 10.7 UART operation in SLEEP abd IDLE modes

Introduction

The Universal Asynchronous Receiver Transmitter (UART) module is the basic serial I/O module available in the dsPIC30F device family. The UART is a full-duplex asynchronous system that can communicate with peripheral devices, such as personal computers, RS-232, and RS-485 interfaces.

The primary features of the UART module are:

* Full-duplex 8- or 9-bit data transmission through the UxTX and UxRX pins,
* For 8-bit data even, odd, or no parity options,
* One or two STOP bits,
* Fully integrated Baud-rate generator with 16-bit prescaler,
* 4-deep First-In-First-Out (FIFO) transmit data buffer,
* 4-deep FIFO receive data buffer,
* Parity, framing and buffer overrun error detection,
* Support for 9-bit mode with address detect (9th bit=1),
* Transmit and receive interrupts,
* Loop-back mode for diagnostic support.

Each dsPIC30F device variant may have one or more UART modules (e.g. dsPIC30F4013 has 2 UART modules).
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Apr 12

Chapter 9: SPI (Serial Pheripheral Interface) Module

* Introduction
* 9.1 8-bit and 16-bit data transfer

* 9.2 Master and slave modes
* 9.2.1 Master mode
* 9.2.2 Slave mode

* 9.3 Framed SPI modes
* 9.3.1 SPI module in master mode and frame master mode
* 9.3.2 SPI module in master mode and frame slave mode
* 9.3.3 SPI module in slave mode and frame master mode
* 9.3.4 SPI module in slave mode and frame slave mode

* 9.4 SPI master mode clock frequency

* 9.5 SPI module operation in SLEEP and IDLE modes
* 9.5.1 SPI module operation in SLEEP mode
* 9.5.2 SPI module operation in IDLE mode

Introduction

The Serial Peripheral Interface (SPI) module is a synchronous serial interface useful for communicating with other peripheral or microcontoller devices. The examples of the peripheral devices are: serial EEPROMs, shift registers, display drivers, serial A/D converters, etc. The SPI module is compatible with Motorola’s SPI and SIOP interfaces.

Depending on the variant, the dsPIC30F family offers one or two SPI modules on a single device. E.g. dsPIC30F3014 has one SPI interface module, whereas dsPIC30F6014 has two.

A standard SPI serial port consists of the following special function registers (SPR):

* SPIxBUF – SFR used to buffer data to be tramsittesd and data that have been received. It consists of two memory locations SPIxTXB (data trasmit) and SPIxRXB (data receive).
* SPIxCON – a control register that configures the module for various modes of operation.
* SPIxSTAT – a status register that indicates various status conditions.

In addition, there is a 16-bit register, SPIxSR, that is not memory mapped. It is used for shifting in and out of the SPI port.

The memory mapped special function register SPIxBUF, the SPI data receive/transmit register, actually consists of two separate registers – SPIxTXB and SPIxRXB. If a user writes data to the SPIxBUF address, internally the data are written to the SPIxTXB (transmit buffer) register. Similarly, when the user reads the received data from the SPIxBUF, internally the data are read from the SPIxRXB (receive buffer) register. This double buffering of transmit and receive operations allows continuous data transfers in the background.

Attention!!!
The user can not write to the SPIxTXB register or read from the SPIxRXB register directly. All reads and writes are performed on the SPIxBUF register.
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Apr 12

Chapter 8: Memory Model

* Introduction
* 8.1 Program memory
* 8.2 Data memory (RAM)
* 8.3 Modulo addressing
* 8.4 Bit-reversed addressing
* 8.5 Stack

* 8.6 Addressing modes
* 8.6.1 Direct memory addressing
* 8.6.2 Direct register addressing
* 8.6.3 Indirect register addressing
* 8.6.4 Literal adrressing

Introduction

The organization of memory and the mode of its use are called the memory model. Understanding the memory model is essential for programming. The memory is divided into the program memory and data memory. The program memory is further divided into the user program space and the user configuration space. The data memory is the space of memory locations used by a program for saving different data required for the program execution. The size of the memory space is different for different members of the dsPIC30F family. Read the rest of this entry »

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Apr 11

Chapter 7: A/D Converter

* Introduction
* 7.1 12-bit A/D converter
* 7.1.1 A/D conversion sequence
* 7.1.3 A/D converter configuration
* 7.1.3 Starting A/D conversion process – start of the sampling process
* 7.1.4 Stopping sampling and starting conversions
* 7.1.5 External event trigger conversion start
* 7.1.6 Controlling sample/conversion operation
* 7.1.7 Writing conversion results into the buffer
* 7.1.8 A/D sampling requirements
* 7.1.9 Reading the A/D result buffer
* 7.1.10 Operation during SLEEP and IDLE modes
* 7.1.10 Operation during SLEEP and IDLE modes

Introduction

A/D (Analogue-to-Digital) converter is a “mixed signal” circuit which performs digitization of the external analogue signals. In the dsPIC30F family there are two microcontroller versions one with 10-bit and the other with 12-bit A/D converter. It has been shown in practice that for the control or regulation systems the 10-bit A/D converters gave satisfactory solutions. The additional bits in the A/D converters in these applications are almost unsuable because they are masked by the high levels of electro-magnetic noise. In the measuring systems the practice showed that with the 12-bit converters one could achieve a good compromise between the sampling rate and accuracy (0.02% for a 12-bit converter).
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Apr 11

Chapter 6: Output Compare Module

* Introduction
* 6.1 Single compare match mode
* 6.1.1 Single compare match, pin OCx driven high
* 6.1.2 Single compare match, pin OCx driven low
* 6.1.3 Single compare match, pin OCx toggles

* 6.2 Dual compare match mode
* 6.2.1 Dual compare match mode, single output pulse at pin OCx
* 6.2.2 Dual compare match mode, sequence of output pulses at pin OCx

* 6.3 The Pulse Width Modulation (PWM) Mode
* 6.3.1 PWM mode without fault protection input
* 6.3.2 PWM mode with fault protection input pin
* 6.3.2 PWM mode with fault protection input pin

* 6.4 PWM period and duty cycle calulation
* 6.4.1 PWM period
* 6.4.2 PWM duty cycle
* 6.4.3 Maximum resolution

* 6.5 Operation of the output compare module in SLEEP or IDLE mode
* 6.5.1 Operation of the output compare module in SLEEP mode
* 6.5.2 Operation of the output compare module in IDLE mode

Introduction

The output compare module has the task of comparing the value of the time base counter with the value of one or two compare registers depending on the Operation mode selected. It is able to generate a single output pulse or a sequence of output pulses when the compared values match; also, it has the ability to generate interrupts on compare match events.

The dsPIC30F4013 controller has 4 output compare modules whereas controller dsPIC6013 has 8. Each output compare channel can select which of the time base counters, TMR2 or TMR3, will be compared with the compare registers. The counter is selected by using control bit OCTSEL (OCxCON<3>).

The output compare module has several modes of operation selectable by using control bits OCM<2:0> (ocXcon<2:0>):

* Single compare match mode,
* Dual compare match mode generating either one output pulse or a sequence of output pulses,
* Pulse Width Modulation (PWM) mode.

NOTE: It is advisable, before switching to a new mode, to turn off the output compare module by clearing control bit OCM<2:0>.
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